A quantum computer needs more than qubits. It also needs electronics that deliver carefully timed instructions, connections that carry those signals without adding too much heat, and a way to fit the entire system inside machinery colder than outer space.
Those supporting components become harder to manage as the number of qubits grows. A team at HRL Laboratories and collaborating institutions has now demonstrated one approach to that problem: a silicon quantum processing unit connected to custom control electronics mounted inside the same cryogenic system.
The peer-reviewed study, published in Nature on July 29, 2026, combines a chip with 54 quantum dots, a controller made with commercial CMOS technology, and a superconducting ribbon cable linking the two temperature stages. The researchers operated individual qubits, pairs of qubits and small error-correction or error-detection circuits.
The paper also discloses a competing interest: HRL filed a provisional patent application covering potential inventions described in the work, and the authors were employees of their listed organizations when the research was completed.
It is a substantial integration experiment. It is not an 18-qubit computer operating as one machine, a fault-tolerant processor, or a demonstration of quantum advantage.
Why the controls matter as much as the qubits
Many experimental quantum processors depend on racks of room-temperature electronics. Signals must travel down into a dilution refrigerator through a growing collection of cables, each of which takes up space and can conduct heat toward the delicate quantum hardware.
That creates a systems problem. Adding qubits is of limited value if every additional device requires more connections that the refrigerator cannot practically accommodate. The HRL work addresses this control-and-interconnect bottleneck by moving the generation of changing control signals closer to the qubit chip.
The controller is a custom mixed-signal system-on-chip made in a commercial 130-nanometer radio-frequency CMOS process. It sits at the refrigerator’s 4-kelvin stage. After a program is loaded, the controller can run it without further communication from electronics at room temperature.
From there, a niobium-on-polyimide superconducting ribbon carries 150 time-varying control signals and 35 static device biases down to the colder qubit stage. The ribbon is designed to conduct the necessary electrical signals while limiting the flow of heat.
The arrangement does not move the entire computer into the refrigerator. Room-temperature hardware still provides digital communication and static biases, and qubit readout is digitized at room temperature. The experiment relocates a consequential part of the control stack, not every supporting function.
Eighteen physical qubits, not 54
The qubit chip contains 54 exchange-coupled quantum dots arranged on three rails. A quantum dot is a tiny structure that confines an electron. In this architecture, three electron spins occupying three dots jointly encode one exchange-only qubit.
That makes the chip configurable for up to 18 physical qubits in a three-by-six layout. The word “encoded” can be confusing here: it describes how each physical exchange-only qubit is constructed from three spins. It does not mean the device contains 18 error-corrected logical qubits.
Nor does the paper report that all 18 physical qubits were run together. Its largest code demonstrations used fewer: seven exchange-only qubits for a distance-5 repetition code and six for a [[4,2,2]] error-detecting code.
Exchange-only qubits are controlled by voltage pulses that alter the exchange interaction between neighboring electron spins. They do not require the microwave waveforms used by some other spin-qubit designs. That comparatively digital-like form of control helps explain why the team paired the chip with low-power CMOS electronics inside the cryostat.
The temperature separation is equally important. The qubit chip is at the millikelvin stage, where the integrated device showed an average electron temperature of 150 millikelvin. The CMOS controller is mounted at 4 kelvins—a much warmer part of the refrigerator. Calling the result a “4 K quantum processor” would wrongly suggest that the qubits themselves operate at 4 kelvins.
What the code experiments establish
Quantum information is fragile, and useful machines will need ways to detect and correct errors without destroying the computation. The HRL team used its integrated controls to run two small code experiments, showing that the architecture can execute circuits relevant to that challenge.
The seven-qubit distance-5 repetition code can protect against one type of error at a time. It is a deliberately limited test, not a complete shield against the range of errors a general-purpose quantum computer must handle. The paper also reports unexplained fluctuations in error rates during the distance-5 experiments.
The six-qubit [[4,2,2]] experiment detects errors and uses post-selection, meaning results associated with detected errors can be discarded. Detection with post-selection is not the same as correcting errors during a fault-tolerant computation. Supporting data for both code experiments were deposited on Zenodo.
Integration is a milestone, not a solved architecture
The importance of the experiment lies in treating the processor as a connected system. The qubit chip, control electronics, interconnect and refrigerator cannot be designed independently if the technology is ever to grow. Moving dynamic-signal generation to the 4-kelvin stage tests one way to reduce the dependence on long runs of room-temperature analog wiring while keeping heat-producing electronics away from the coldest stage.
But the paper also identifies work that remains. The controller must use less power per qubit. Routing and interconnects need manufacturing methods suitable for larger systems. Quantum-dot devices need greater uniformity, and calibration cannot become unmanageable as the array expands. A complete computer will also require a broader system architecture than the components demonstrated here.
Those constraints make “utility scale” a direction proposed by the researchers, not an achieved result. The chip’s 18-qubit capacity is not simultaneous operation. The relevant advance is that the study joins multiple layers of hardware and uses them to perform published qubit and code experiments.
The work therefore offers a plausible piece of a scaling strategy rather than evidence that scaling has been solved. Quantum computing will require better qubits and better error control, but also mundane-seeming engineering around cables, heat, signal generation and manufacturing. This experiment brings those layers closer together—and makes clear how much must still work before an integrated quantum processor becomes a useful computer.